SPICE Netlist Syntax

SPICE netlists are plain-text files that describe a circuit's components, connections, and analysis commands. spice-rs accepts standard SPICE3-compatible netlists.

A netlist has three sections:

  1. Title line -- the first line of the file (always treated as a comment)
  2. Circuit description -- device instances, model definitions, subcircuits
  3. Analysis commands -- what simulation to run
Simple RC Circuit
R1 in out 1k
C1 out 0 1u
V1 in 0 DC 5
.OP
.END

Netlist Format

File structure

Rule Details
Title line First line of the file. Always treated as a comment.
Comments Lines starting with * are ignored.
End marker .END marks the end of the netlist. Everything after is ignored.
Continuation Lines starting with + are appended to the previous line.
Ground node Node 0 (or GND) is the global reference (ground). Every circuit must have at least one connection to node 0.
Case Case insensitive. R1, r1, and R1 are the same element.

Comments

* This entire line is a comment
R1 in out 1k   $ Inline comments use $ (ngspice extension)

Line continuation

Long lines can be split with +:

M1 drain gate source bulk NMOS
+ W=10u L=0.18u
+ AD=5p AS=5p

This is equivalent to a single line:

M1 drain gate source bulk NMOS W=10u L=0.18u AD=5p AS=5p

Number suffixes

Numeric values accept standard engineering suffixes:

Suffix Multiplier Example
T 1e12 1T = 1e12
G 1e9 2.2G = 2.2e9
MEG 1e6 4.7MEG = 4.7e6
K 1e3 10K = 1e4
M 1e-3 5M = 5e-3
MIL 25.4e-6 1MIL = 25.4e-6
U 1e-6 100U = 1e-4
N 1e-9 10N = 1e-8
P 1e-12 22P = 2.2e-11
F 1e-15 1F = 1e-15

Suffixes are case insensitive. Trailing alphabetic characters after a recognized suffix are ignored, so 10uF parses as 10e-6 (the F is not a femto suffix because u was already matched).

Scientific notation is also accepted: 1.5e-3, 2.0E6.

Node names

Nodes can be numeric (1, 2, 3) or alphanumeric (in, out, Vdd). Node 0 is always ground.


Device Statements

Each device instance is a single line (or continued with +). The first letter of the name determines the device type.

Resistor (R)

Rname n+ n- value [ac=acval]
R1 in out 4.7K
Rload out 0 50 ac=100

Capacitor (C)

Cname n+ n- value [ic=v0]
C1 out 0 100N
Cbypass vdd 0 10U ic=3.3

Inductor (L)

Lname n+ n- value [ic=i0]
L1 in out 10U
Lchoke supply filtered 100U ic=0.5

Coupled Inductors (K)

Kname Lname1 Lname2 coupling
L1 in 0 10U
L2 out 0 10U
K1 L1 L2 0.99

Transmission Line (T)

Tname n1 n2 n3 n4 Z0=val TD=val
T1 in 0 out 0 Z0=50 TD=1N

Voltage Source (V)

Vname n+ n- [DC val] [AC mag [phase]] [transient_spec]

Transient specifications:

Type Syntax
Pulse PULSE(v1 v2 td tr tf pw per)
Sine SIN(vo va freq td theta)
Exponential EXP(v1 v2 td1 tau1 td2 tau2)
Piece-wise linear PWL(t1 v1 t2 v2 ...)
V1 vdd 0 DC 5
Vac in 0 AC 1 0
Vclk clk 0 PULSE(0 3.3 0 1N 1N 5U 10U)
Vsin sig 0 SIN(0 1 1K)

Current Source (I)

Iname n+ n- [DC val] [AC mag [phase]] [transient_spec]

Same transient specifications as voltage sources. Current flows from n+ through the source to n-.

I1 0 bias DC 100U
Iac 0 in AC 1M

Diode (D)

Dname n+ n- modelname [area]

n+ is the anode, n- is the cathode.

D1 in out DMOD
.MODEL DMOD D (IS=1e-14 N=1.05 RS=10)

MOSFET (M)

Mname drain gate source bulk modelname [W=val] [L=val] [M=val]
+ [AD=val] [AS=val] [PD=val] [PS=val] [NRD=val] [NRS=val]
M1 out in vdd vdd PMOS W=10U L=0.18U
M2 out in 0 0 NMOS W=5U L=0.18U M=2
.MODEL NMOS NMOS (VTO=0.7 KP=110U)
.MODEL PMOS PMOS (VTO=-0.7 KP=50U)

BJT (Q)

Qname collector base emitter [substrate] modelname [area]
Q1 out base 0 NPN1
Q2 out base emitter sub PNP1 2.0
.MODEL NPN1 NPN (IS=1e-15 BF=200)
.MODEL PNP1 PNP (IS=1e-15 BF=100)

JFET (J)

Jname drain gate source modelname [area]
J1 out gate 0 JMOD
.MODEL JMOD NJF (VTO=-2 BETA=1e-4)

VCVS -- Voltage-Controlled Voltage Source (E)

Ename n+ n- nc+ nc- gain

VCCS -- Voltage-Controlled Current Source (G)

Gname n+ n- nc+ nc- gain

CCVS -- Current-Controlled Voltage Source (H)

Hname n+ n- vcontrol gain

CCCS -- Current-Controlled Current Source (F)

Fname n+ n- vcontrol gain

Analysis Commands

Each netlist contains one or more analysis commands that tell the simulator what to compute.

.OP -- DC Operating Point

.OP

Computes the DC bias point of the circuit. All capacitors are open-circuited, all inductors are short-circuited. Reports node voltages and branch currents.

.DC -- DC Sweep

.DC srcname start stop step [src2 start2 stop2 step2]

Sweeps a source value and computes the DC operating point at each step. Optionally nests a second sweep.

Parameter Description
srcname Name of the source to sweep (e.g., V1)
start Starting value
stop Ending value
step Increment
.DC V1 0 5 0.1
.DC V1 0 5 0.1 V2 0 3.3 1.1

.AC -- AC Frequency Sweep

.AC DEC|OCT|LIN npts fstart fstop

Linearizes the circuit around its DC operating point and computes the small-signal frequency response.

Parameter Description
DEC Points per decade
OCT Points per octave
LIN Total points, linearly spaced
npts Number of points (per decade/octave, or total for LIN)
fstart Start frequency (Hz)
fstop Stop frequency (Hz)
.AC DEC 10 1 1MEG
.AC LIN 100 60 60

.TRAN -- Transient Analysis

.TRAN tstep tstop [tstart [tmax]] [UIC]

Time-domain simulation using numerical integration.

Parameter Description
tstep Suggested output time step
tstop End time
tstart Start saving data at this time (default: 0)
tmax Maximum internal time step (default: tstop/50)
UIC Use initial conditions -- skip DC operating point, use ic= values on devices
.TRAN 1N 10U
.TRAN 10N 1M 0 100N UIC

.SENS -- Sensitivity Analysis

.SENS V(node)
.SENS V(node1, node2)
.SENS I(source)

.TF -- Transfer Function

.TF V(node[,ref]) input_source
.TF I(source) input_source

.PZ -- Pole-Zero Analysis

.PZ node1 node2 node3 node4 VOL|CUR PZ|POL|ZER

Multiple analyses

A netlist can contain multiple analysis commands. They run sequentially:

RC Filter
V1 in 0 AC 1 DC 1
R1 in out 1K
C1 out 0 1U
.OP
.AC DEC 20 1 100K
.END

Control Statements

Control statements configure models, subcircuits, parameters, and simulation behavior.

.MODEL -- Device Model Definition

.MODEL name type (param=val ...)
Type Device
D Diode
NPN NPN BJT
PNP PNP BJT
NMOS N-channel MOSFET
PMOS P-channel MOSFET
NJF N-channel JFET
PJF P-channel JFET
.MODEL DMOD D (IS=1e-14 N=1.05 RS=10 CJO=2P)
.MODEL NMOS NMOS (LEVEL=1 VTO=0.7 KP=110U GAMMA=0.4)
.MODEL NPN1 NPN (IS=1e-15 BF=200 VAF=100)

For MOSFET models, the LEVEL parameter selects the model:

Level Model
1 Shichman-Hodges (MOS1)
2 Grove-Frohman (MOS2)
3 Semi-empirical (MOS3)
8 BSIM3v3
14 BSIM4

.SUBCKT / .ENDS -- Subcircuit Definition

.SUBCKT name node1 node2 ...
  ... circuit description ...
.ENDS [name]

Defines a reusable subcircuit. Internal nodes are local. Instantiate with X:

.SUBCKT INV in out vdd vss
M1 out in vdd vdd PMOS W=2U L=0.18U
M2 out in vss vss NMOS W=1U L=0.18U
.ENDS INV

X1 a y vdd 0 INV

.PARAM -- Parameter Definition

.PARAM name=expression
.PARAM vdd_val=3.3
.PARAM rload=10K
V1 vdd 0 DC {vdd_val}
R1 out 0 {rload}

.OPTIONS -- Simulation Options

.OPTIONS key=value ...

See Chapter 15: Simulation Options for the full list.

.OPTIONS RELTOL=1e-4 ABSTOL=1e-14 TEMP=85

.INCLUDE -- File Inclusion

.INCLUDE "filename"

.LIB -- Library Inclusion

.LIB "filename" section

Library file format:

.LIB TT
.MODEL NMOS NMOS (VTO=0.5 ...)
.MODEL PMOS PMOS (VTO=-0.5 ...)
.ENDL TT

.IC -- Initial Conditions

.IC V(node)=val ...

Forces specific node voltages as initial conditions for transient analysis.

.IC V(out)=0 V(vdd)=3.3

.NODESET -- DC Operating Point Hints

.NODESET V(node)=val ...

Provides an initial guess for the DC operating point solver. Unlike .IC, these are hints -- the solver can move away from them. Useful for helping convergence in circuits with multiple stable states (e.g., latches, oscillators).

.NODESET V(q)=3.3 V(qbar)=0