Transient Analysis

Transient analysis answers the most direct question you can ask a circuit simulator: given these input signals, what are the voltages and currents as a function of time?

Apply a step to an RC circuit and watch the exponential charge. Toggle a clock signal into a logic gate and see the propagation delay. Feed a pulse into a transmission line and watch it ring. Transient analysis simulates all of this by solving the circuit equations at every timestep from to the end of the simulation.

Unlike DC analysis (one solve) or AC analysis (linearized, one solve per frequency), transient analysis is the full nonlinear problem at every single timestep. Every Newton-Raphson iteration from Chapter 3 runs at every time point. This makes transient analysis by far the most computationally expensive analysis in SPICE.

Numerical Integration

At the heart of transient analysis is a problem: capacitors and inductors are described by differential equations, but SPICE's matrix solver only handles algebraic equations. Numerical integration bridges this gap.

The differential equation

A capacitor's current: . An inductor's voltage: . These are ODEs. In continuous time they describe smooth, evolving quantities. But the simulator works at discrete time points and must approximate the derivative using values at previous time points.

Companion models

The key insight is that a numerical integration formula converts a capacitor's differential equation into an algebraic relationship: a conductance in parallel with a current source. This "companion model" changes at every timestep but is always a simple linear element that stamps directly into the MNA matrix.

This is the same trick that Newton-Raphson uses for nonlinear devices: convert something hard (a differential equation) into something the MNA matrix can handle (a linear conductance plus a current source).

Charge as the fundamental quantity

SPICE integrates charge (or flux), not voltage (or current) directly. Why? Because charge is conserved. Numerical errors in tracking charge lead to small voltage errors, but conservation of charge is maintained. Integrating voltage directly could create or destroy charge, causing instability.

The Trapezoidal Rule

The trapezoidal rule is the default integration method in SPICE. It approximates the integral by averaging the function's value at the beginning and end of each interval.

The formula

Since depends on , the method is implicit -- Newton-Raphson iteration is required at each timestep.

The companion model for a capacitor

Applying the trapezoidal rule to :

The equivalent conductance makes physical sense: a large capacitance or small timestep means a large equivalent conductance (the capacitor resists rapid voltage change). The current source carries forward the memory of the previous timestep.

Advantages

Second-order accuracy. The local truncation error is proportional to . This is the main reason trapezoidal is the default.

A-stability. The method is stable for all timestep sizes -- it will never diverge.

Time-reversibility. A lossless LC circuit will oscillate forever at constant amplitude, which is the physically correct behavior.

The disadvantage: numerical ringing

The same time-reversibility that preserves oscillations can create spurious oscillations in stiff circuits. This is trapezoidal ringing -- the trapezoidal rule, having no numerical damping, can produce decaying oscillations around the true solution.

Gear (BDF) Methods

The Gear methods (Backward Differentiation Formulas) are the standard alternative to the trapezoidal rule. They trade some accuracy for guaranteed damping of spurious oscillations.

The idea

BDF methods approximate the derivative directly using a backward difference formula. Gear-1 (backward Euler):

Gear-2 uses two past points:

Why BDF methods damp ringing

BDF methods weight the new value more heavily than the old, introducing numerical damping that suppresses the high-frequency oscillations that plague the trapezoidal rule on stiff circuits.

Variable-order strategy

spice-rs uses a variable-order strategy:

Start at order 1 (backward Euler) at the beginning and at breakpoints, where the solution may have discontinuities.
Promote to order 2 (trapezoidal) when the solution is smooth and the higher order allows a significantly larger timestep.
Drop back to order 1 at breakpoints to handle potential discontinuities.

Timestep Control

A fixed timestep is either too small (wasting computation) or too large (missing transitions). SPICE uses adaptive timestep control -- the simulator dynamically adjusts based on how rapidly the solution is changing.

The accept/reject loop

At every timestep:

Choose timestep , advance time, compute integration coefficients, run Newton-Raphson.
NR convergence check: If NR fails to converge, reject the step, divide by 8, retry.
LTE check: If the local truncation error is too large, reject, compute a smaller , retry.
If both checks pass, accept the step and record the solution.

Local Truncation Error (LTE)

The LTE measures how much error the integration method introduces at a single step. For the trapezoidal rule:

SPICE estimates the LTE using the predictor-corrector difference and adjusts the timestep accordingly.

The timestep floor

There is a hard lower bound: . Below this, floating-point arithmetic can't meaningfully distinguish one time point from the next. If the simulation can't proceed at this floor, it fails with "timestep too small."

The acceptance threshold: 0.9

The LTE check requires . This 10% margin avoids excessive rejection of steps that are only slightly too large.

The doubling cap

After a successful step, the timestep never more than doubles: . This prevents dangerous jumps into unseen fast transitions.

Breakpoints

Adaptive timestep control works when the waveform is smooth. But what about abrupt transitions? A PULSE source with a 1 ns rise time could be stepped right over if the simulator is cruising with a 10 s timestep.

Breakpoints are a list of future times where something interesting will happen. The transient engine ensures a timestep lands exactly on each breakpoint.

Three cases

At a breakpoint: Drop integration order to 1 (backward Euler). Restrict timestep aggressively. Take many small steps through the transition.

About to overshoot: Clip the timestep to land exactly on the breakpoint.

Far from a breakpoint: Normal adaptive operation.

Source registration

Breakpoints are registered dynamically. At each accepted step, each PULSE and PWL source reports its next transition time. Breakpoints that are too close together (within ) are merged.

Transient Circuits

RC Step Response

The simplest transient circuit: a resistor, a capacitor, and a voltage step.

The output voltage follows the classic first-order exponential:

where is the time constant. It is the time for the capacitor to reach of the final value. After , the capacitor is within 0.7% of the final value -- effectively fully charged.

The dashed line marks 63.2% of the final value, reached at . Drag the R and C sliders to see the time constant change -- larger R or C means slower charging.

Formula vs SPICE

Now let's run the actual SPICE simulator on the same circuit and see what it does internally:

The top plot is the voltage waveform from spice-rs — it matches the analytical formula exactly. The bottom plot reveals something the formula can't: the timestep sizes the simulator chose. Small steps cluster near where the voltage changes rapidly. As the rate of change slows, the LTE-based timestep controller allows larger and larger steps. This is the adaptive algorithm at work.

What the simulator does

At , the DC operating point gives . Then the transient engine steps forward. The LTE mechanism keeps the timestep small during the steep initial rise, allows it to grow as the rate of change slows, and races through the flat tail with maximum steps. For this linear circuit, every step converges in a single NR iteration.

The companion model in action

At each timestep, the capacitor's companion model creates a conductance in parallel with a current source. The resulting MNA system:

A single equation, solved in one NR step -- trivial for the computer, but conceptually the same process that runs on a 10,000-node circuit.

RC step response circuit

MOSFET Switching

A more realistic transient scenario: a MOSFET driven by a pulse, switching a resistive load. This exercises every part of the transient engine -- nonlinear devices, Newton-Raphson iteration, breakpoints, and adaptive timestep control.

Turn-on ( rising from 0 to 5V): As increases past the threshold, the MOSFET enters its active region. The gate capacitances (, ) must be charged. The Miller effect slows the transition: is connected between the gate (rising) and the drain (falling), and the effective capacitance is amplified. The MOSFET transitions through cutoff, saturation, and linear in rapid succession.

Steady state (MOSFET on): The MOSFET is in the linear region, acting as a small resistance. The LTE mechanism ramps the timestep up to the maximum.

Turn-off ( falling): The reverse process, with another Miller plateau.

What the simulator sees

For a turn-on edge, the timestep varies by four orders of magnitude within a single switching event -- picoseconds during the transition, microseconds during settling. The NR iteration count peaks during region transitions. The integration order drops to 1 at breakpoints and promotes back to 2 once the waveform is smooth.

From these examples to real circuits

The RC circuit and MOSFET switch are building blocks. A real digital circuit might have thousands of MOSFETs, each with its own gate capacitance, Miller effect, and switching trajectory. The transient engine handles all of these with the same machinery: companion models for energy storage, Newton-Raphson for nonlinearity, LTE for timestep control, and breakpoints for synchronization with the stimulus.